#ifndef __DMA_H
#define __DMA_H

void DMA_Open_M(OB_DMA_Type *pDMA,uint32_t Sourec_Addr, uint32_t Des_Addr, uint32_t DataLength);
void DMA_Open_ADC(OB_DMA_Type *pDMA,uint32_t Source_Addr, uint32_t Dest_Addr, uint32_t DataLength );

void DMA_DestinationAddr(OB_DMA_Type *pDMA, uint32_t DestinationAddr);
void DMA_Enable(OB_DMA_Type *pDMA);
void DMA_DataLength(OB_DMA_Type *pDMA, uint32_t Length);
void DMA_TriggerEvent(OB_DMA_Type *pDMA, uint32_t SourecEvent);
void DMA_DataWidth(OB_DMA_Type *pDMA,uint32_t SourecWidth, uint32_t DestWidth);
void DMA_AddrInc(OB_DMA_Type *pDMA, uint32_t SourceAddrInc, uint32_t DestAddrInc);
void DMA_SourceAddr(OB_DMA_Type *pDMA, uint32_t SourceAddr);
#define DMA_EVENT_SPI0_Rx   0x0101
#define DMA_EVENT_SPI1_Rx   0x0102
#define DMA_EVENT_SPI2_Rx   0x0103
#define DMA_EVENT_UART0_Rx  0x0104
#define DMA_EVENT_UART1_Rx  0x0105
#define DMA_EVENT_UART2_Rx  0x0106
#define DMA_EVENT_I2S_Rx    0x0109
#define DMA_EVENT_USB_Rx    0x010A
#define DMA_EVENT_ADC       0x010B

#define DMA_EVENT_SPI0_Tx   0x0001
#define DMA_EVENT_SPI1_Tx   0x0002
#define DMA_EVENT_SPI2_Tx   0x0003
#define DMA_EVENT_UART0_Tx  0x0004
#define DMA_EVENT_UART1_Tx  0x0005
#define DMA_EVENT_UART2_Tx  0x0006
#define DMA_EVENT_I2S_Tx    0x0009
#define DMA_EVENT_USB_Tx    0x000A

#define DMA_ADDR_INC_0       0x00
#define DMA_ADDR_INC_SINGLE  0x02




#define DMA_WIDTH_BYTE      0x00
#define DMA_WIDTH_HALF_WORD 0x01
#define DMA_WIDTH_WORD      0x02

#define DMA_INTERRUPT_ENABLE      0x04
#define DMA_INTERRUPT_STATUS      0x02

#define RAM_ADDR_RX 0x20001800
#define RAM_ADDR_TX 0x20000EF0

extern volatile uint32_t gDMA_Int;

#endif
