/********************************************************************
 *
 * Copyright (C) 2005-2023 On-Bright Electronics Co., Ltd. All rights reserved.
 *
 * SPDX-License-Identifier : BSD 3-Clause license
 *
 * This software component is licensed by On-Bright under BSD 3-Clause license,
 * the "License"; You may not use this file execept in compliance with the
 * License. You may obtain a copy of the License at :
 * https://opensource.org/license/BSD-3-Clause
 *
********************************************************************/

#include "stdint.h"

/********************************************************************
User Options (Setting by User)
********************************************************************/
#define UOP_CODE_PROTECT    0x01        // Code protect.
                                        // 0 = Enabled
                                        // 1 = Disabled
                            
#define UOP_ISP_ENTRY       0x00        // ISP Entry.
                                        // 0x00   = CPU address start from user code. (APROM)
                                        // Others = CPU address start from ISP code.
                           
#define UOP_IAP_STR_ADDR    0x00000000  // IAP start address
                            
#define UOP_IAP_END_ADDR    0x0000FFFF  // IAP end address
                            
#define UOP_PADE_RESET      0x5A        // Pad enable reset
                                        // 0x5A   = GPIO function mode.
                                        // Others = RESET function mode.

#define UOP_FRE_FETCH       0x00        // Fre-fetch 
                                        // 0x00 = Disable.
                                        // 0x26 = Enable.


#define UOP_DATA_P0         0xFFFF      // GPIO output data.
#define UOP_DATA_P1         0xFFFF      // GPIO output data.
#define UOP_DATA_P2         0xFFFF      // GPIO output data.
#define UOP_DATA_P3         0xFFFF      // GPIO output data.
        
#define UOP_MODE_P0_0       3U          // GPIO Mode : Determine IO mode of the GPIO PortX_X.
#define UOP_MODE_P0_1       3U          // 0 = Pullup
#define UOP_MODE_P0_2       3U          // 1 = Open drain
#define UOP_MODE_P0_3       3U          // 2 = Push Pull
#define UOP_MODE_P0_4       3U          // 3 = Input Mode
#define UOP_MODE_P0_5       3U
#define UOP_MODE_P0_6       3U
#define UOP_MODE_P0_7       3U
#define UOP_MODE_P0_8       3U
#define UOP_MODE_P0_9       3U
#define UOP_MODE_P0_10      3U
#define UOP_MODE_P0_11      3U
#define UOP_MODE_P0_12      3U
#define UOP_MODE_P0_13      3U
#define UOP_MODE_P0_14      3U
#define UOP_MODE_P0_15      3U

#define UOP_MODE_P1_0       3U
#define UOP_MODE_P1_1       3U
#define UOP_MODE_P1_2       3U
#define UOP_MODE_P1_3       3U
#define UOP_MODE_P1_4       3U
#define UOP_MODE_P1_5       3U
#define UOP_MODE_P1_6       3U
#define UOP_MODE_P1_7       3U
#define UOP_MODE_P1_8       3U
#define UOP_MODE_P1_9       3U
#define UOP_MODE_P1_10      3U
#define UOP_MODE_P1_11      3U
#define UOP_MODE_P1_12      3U
#define UOP_MODE_P1_13      3U
#define UOP_MODE_P1_14      3U
#define UOP_MODE_P1_15      3U

#define UOP_MODE_P2_0       3U
#define UOP_MODE_P2_1       3U
#define UOP_MODE_P2_2       3U
#define UOP_MODE_P2_3       3U
#define UOP_MODE_P2_4       3U
#define UOP_MODE_P2_5       3U
#define UOP_MODE_P2_6       3U
#define UOP_MODE_P2_7       3U
#define UOP_MODE_P2_8       3U
#define UOP_MODE_P2_9       3U
#define UOP_MODE_P2_10      3U
#define UOP_MODE_P2_11      3U
#define UOP_MODE_P2_12      3U
#define UOP_MODE_P2_13      3U
#define UOP_MODE_P2_14      3U
#define UOP_MODE_P2_15      3U



                         
/********************************************************************
Process and Allocate User Options Data (Setting by Vendor)
********************************************************************/

#define UOP_MODE_P0         ( (UOP_MODE_P0_15<<30) | (UOP_MODE_P0_14<<28) | (UOP_MODE_P0_13<<26) | (UOP_MODE_P0_12<<24) |  \
                              (UOP_MODE_P0_11<<22) | (UOP_MODE_P0_10<<20) | (UOP_MODE_P0_9 <<18) | (UOP_MODE_P0_8 <<16) |  \
                              (UOP_MODE_P0_7 <<14) | (UOP_MODE_P0_6 <<12) | (UOP_MODE_P0_5 <<10) | (UOP_MODE_P0_4 <<8 ) |  \
                              (UOP_MODE_P0_3 <<6 ) | (UOP_MODE_P0_2 <<4 ) | (UOP_MODE_P0_1 <<2 ) | (UOP_MODE_P0_0) )

#define UOP_MODE_P1         ( (UOP_MODE_P1_15<<30) | (UOP_MODE_P1_14<<28) | (UOP_MODE_P1_13<<26) | (UOP_MODE_P1_12<<24) |  \
                              (UOP_MODE_P1_11<<22) | (UOP_MODE_P1_10<<20) | (UOP_MODE_P1_9 <<18) | (UOP_MODE_P1_8 <<16) |  \
                              (UOP_MODE_P1_7 <<14) | (UOP_MODE_P1_6 <<12) | (UOP_MODE_P1_5 <<10) | (UOP_MODE_P1_4 <<8 ) |  \
                              (UOP_MODE_P1_3 <<6 ) | (UOP_MODE_P1_2 <<4 ) | (UOP_MODE_P1_1 <<2 ) | (UOP_MODE_P1_0) )

#define UOP_MODE_P2         ( (UOP_MODE_P2_15<<30) | (UOP_MODE_P2_14<<28) | (UOP_MODE_P2_13<<26) | (UOP_MODE_P2_12<<24) |  \
                              (UOP_MODE_P2_11<<22) | (UOP_MODE_P2_10<<20) | (UOP_MODE_P2_9 <<18) | (UOP_MODE_P2_8 <<16) |  \
                              (UOP_MODE_P2_7 <<14) | (UOP_MODE_P2_6 <<12) | (UOP_MODE_P2_5 <<10) | (UOP_MODE_P2_4 <<8 ) |  \
                              (UOP_MODE_P2_3 <<6 ) | (UOP_MODE_P2_2 <<4 ) | (UOP_MODE_P2_1 <<2 ) | (UOP_MODE_P2_0) )



const uint32_t rMMCRP       __attribute__((section(".ARM.__at_0x0000FE00"))) = UOP_CODE_PROTECT;
const uint32_t rISPET       __attribute__((section(".ARM.__at_0x0000FE04"))) = UOP_ISP_ENTRY;
const uint32_t rIAPSA       __attribute__((section(".ARM.__at_0x0000FE08"))) = UOP_IAP_STR_ADDR;
const uint32_t rIAPEA       __attribute__((section(".ARM.__at_0x0000FE0C"))) = UOP_IAP_END_ADDR;
const uint32_t rCTRO        __attribute__((section(".ARM.__at_0x0000FE10"))) = (UOP_PADE_RESET << 16) | (UOP_FRE_FETCH << 24);
const uint32_t rGPIODATA0   __attribute__((section(".ARM.__at_0x0000FE20"))) = UOP_DATA_P0;
const uint32_t rGPIOMODE0   __attribute__((section(".ARM.__at_0x0000FE24"))) = UOP_MODE_P0;
const uint32_t rGPIODATA1   __attribute__((section(".ARM.__at_0x0000FE28"))) = UOP_DATA_P1;
const uint32_t rGPIOMODE1   __attribute__((section(".ARM.__at_0x0000FE2C"))) = UOP_MODE_P1;
const uint32_t rGPIODATA2   __attribute__((section(".ARM.__at_0x0000FE30"))) = UOP_DATA_P2;
const uint32_t rGPIOMODE2   __attribute__((section(".ARM.__at_0x0000FE34"))) = UOP_MODE_P2;

