#include <math.h> 
#include <stdio.h>

#include "OB6627.h"
#include "gpio.h"
#include "uart.h"
#include "wdt.h"
#include "mdu.h"
#include "spi.h"
#include "pwm.h"
#include "adc.h"
#include "acmp.h"
#include "timer32.h"
#include "timer16.h"
#include "fmc.h"
#include "dma.h"

int CTN = 0;
int K1 = 0;
int K2 = 0;
int ADC1_Buf[8] = {0};

void DMA_Config(void)
{
	 OB_PDMA0->PDMA_CSR = 0;//dma register reset
	 OB_PDMA0->PDMA_CYC = 4;//ADC_CH Numbers
	 OB_PDMA0->PDMA_CSR_b.BURMOD = 0;//no bursh
	
   OB_PDMA0->PDMA_CSR_b.SRCADRSEL = DMA_BUS_APB;//ADC
	 OB_PDMA0->PDMA_SRCADR = 0x4001C014;//(UI32)(&OB_ADC->A0RS0);
	 OB_PDMA0->PDMA_CSR_b.SRCADRINC = DMA_MODE_INC_4;//inc 4 chns
	 OB_PDMA0->PDMA_CSR_b.SRCREQSEL = DMA_EVENT_ADC0;//DMA EVENT source
	 
	 OB_PDMA0->PDMA_CSR_b.DESADRSEL = DMA_BUS_AHB;//Memory
//	 OB_PDMA0->PDMA_DESADR = (UI32)(&ADC1_Buf);
	 OB_PDMA0->PDMA_DESADR = (unsigned int)(&ADC1_Buf);
	 OB_PDMA0->PDMA_CSR_b.DESADRINC = DMA_MODE_INC_4;//inc 4 chns
	 OB_PDMA0->PDMA_CSR_b.DESREQSEL = 0;//DMA EVENT source
	 
	 OB_PDMA0->PDMA_CSR_b.DATAWIDTH = DMA_WIDTH_WORD;//16bits
	
	 OB_PDMA0->PDMA_CSR_b.FININTSTS = 1; //IE flag clean
	 OB_PDMA0->PDMA_CSR_b.FININTENB = 1; //DMA0 IE ENABLE
	 OB_PDMA0->PDMA_CSR_b.ENB = 1; //DMA0 ENABLE
}
//==============================================================================

void ADC_Config(void)
{
	NVIC_EnableIRQ(ADC_IRQn);
	
	OB_ADC->CON_b.EN0 = 1;
	OB_ADC->CON_b.MODE0 = 1;// 0:10bits;  1:12bits
//	OB_ADC->CON_b.RSTRSIN0 = 1;
	OB_ADC->RSIN0 = 0x80000000;
	OB_ADC->CD0   = 0; //48MHz
	while(1)
	{
			if ((OB_ADC->CALCON0& 0x101) == 0x01)
					break;
	}

 OB_ADC->A0SC0_b.SC1 = ADC_CHANNEL_0; //ADC_INPUT_1ST //Iad_w
 OB_ADC->A0SC0_b.SC2 = ADC_CHANNEL_1; //ADC_INPUT_2ND //Iad_v
 OB_ADC->A0SC0_b.SC3 = ADC_CHANNEL_6; //ADC_INPUT_3RD //Iad_ave
 OB_ADC->A0SC0_b.SC4 = ADC_CHANNEL_7; //ADC_INPUT_4TH //Vbus
 //OB_ADC->A0SC1_b.SC1 = ADC_CHANNEL_4; //ADC_INPUT_5TH
 //OB_ADC->A0SC1_b.SC2 = ADC_CHANNEL_5; //ADC_INPUT_6TH
// OB_ADC->A0SC1_b.SC3 = ADC_CHANNEL_4; //ADC_INPUT_7TH
// OB_ADC->A0SC1_b.SC4 = ADC_CHANNEL_12; //ADC_INPUT_8TH //ADC_CH12 //OPA_O0 
// OB_ADC->A0SC1_b.SC4 = ADC_CHANNEL_13; //ADC_INPUT_8TH //ADC_CH13 //OPA_O1 
// OB_ADC->A0SC1_b.SC4 = ADC_CHANNEL_14; //ADC_INPUT_8TH //ADC_CH14 //OPA_O2 

	OB_ADC->SH0 = 1;//sample&hold time
	OB_ADC->SL0 = 4;//seq length
	OB_ADC->CONDMA0_b.DMAE = 1; //dma enable
	OB_ADC->IEENS_b.SEQ0 = 1; //Interrupt Enable 
  OB_ADC->CON_b.START0 = 1;
}
//==============================================================================

void RCC_Config(void)  
{
	SystemCoreClockUpdate();
}
//==============================================================================

void  NVIC_Config(void) 
{
	NVIC_SetPriority(ADC_IRQn, 0);
	NVIC_SetPriority(PDMA_IRQn, 1);

	NVIC_EnableIRQ(ADC_IRQn);
	NVIC_EnableIRQ(PDMA_IRQn);
}

//==============================================================================

void IWDG_Config(void)
{
	OB_WWDT->WWDTRLD = 0x6996C33C;
	OB_WWDT->WWDTCR =  0x00;
	OB_WWDT->WWDTCR_b.WWDTIE = 0;
	OB_WWDT->WWDTCR_b.PERIODSEL = WDT_PRESCALER_64;
	OB_WWDT->WWDTCR_b.WINCMP = 0x20;
	OB_WWDT->WWDTCR_b.WWDTEN = 1;
	OB_WWDT->WWDTRLD = 0x00005AA5;
}
//==============================================================================

void System_Config(void)                                
{
  NVIC_Config();	//@99
  RCC_Config();
  DMA_Config();
  ADC_Config();
	IWDG_Config();
//  RCC_Config();
//  ADC_Config();
//  DMA_Config();
//  NVIC_Config();
//  IWDG_Config();
}
//==============================================================================

void IWDG_ReloadCounter(void)
{
    OB_WWDT->WWDTRLD = 0x00005AA5;
}
//==============================================================================

int main(void)
{    
  System_Config(); 

  while(1)
  {
	IWDG_ReloadCounter();
  }
	
//	return 0;	//@99
}
//==============================================================================

void ADC_IRQHandler(void)
{
		OB_ADC->IESTC = OB_ADC->IEST; //clean status
}
//==============================================================================

//void DMA_IRQHandler(void)
void PDMA_IRQHandler(void)
{
	if(CTN < 10000)
		CTN ++;
	else
		CTN = 0;	
	if( (OB_PDMA0->PDMA_CSR & DMA_INTERRUPT_STATUS) != 0x00)
    {
        OB_PDMA0->PDMA_CSR_b.FININTSTS = 1; // clear status
    }
}
//==============================================================================

//==============================================================================
